Cypress CY24272 Clock User Manual


 
CY24272
Document Number: 001-42414 Rev. ** Page 11 of 13
Figure 4. Input and Output Waveforms
Figure 5. Crossing Point Voltage
Figure 6. Cycle-to-cycle Jitter
Figure 7. Cycle-to-cycle Duty-cycle Error
V
H
t
R
t
F
80%
20%
V
L
V
(t)
Vx.nom
CLK
CLKB
Vx+
Vx-
CLK
CLKB
t
CYCLE,i
t
CYCLE,i+1
t
J
= t
CYCLE,i
- t
CYCLE,i+1 over 10,000 consecutive cycles
CLK
CLKB
t
CYCLE,
(i)
t
PW-
(i)
t
PW+
(i)
t
PW-
(i+1)
t
PW+
(i+1)
t
CYCLE,
(i+1)
t
DC,ERR
= t
PW-
(i) - t
PW-
(i+1) and t
PW-
(i+1) - t
PW+
(i+1)
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