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CY7C1307BV25
CY7C1305BV25
Document #: 38-05630 Rev. *A Page 19 of 21
Switching Waveforms
[27, 28, 29]
Notes:
27.Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, i.e., A0+1.
28.Outputs are disabled (High-Z) one clock cycle after a NOP.
29. In this example, if address A2 = A1 then data Q20 = D10 and Q21 = D11. Write data is forwarded immediately as read results.This note applies to the whole diagram.
K
1
23456
7
K
RPS
W
PS
A
Q
D
C
C
A0
READ READWRITE WRITE
Q00 Q03
D10 D11 D12 D13 D30 D31 D32 D3
3
A1
t
KH
t
KHKH
t
KHCH
t
CO
t
DOH
t
KL
t
CYC
t t
HC
t
SA
t
HA
t
SD
t
HD
t
KHCH
Q01 Q02 Q23Q22Q20 Q21
NOP NOP
Qx3
A2
t
SD
t
HD
DON’T CARE UNDEFINE
D
t
CLZ
t
CO
t
DOH
t
CHZ
SC
t
t
HC
SC
t
KH
t
KHKH
t
KL
t
CYC
A3
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