Cypress CY7C64215 Network Card User Manual


 
CY7C64215
Document 38-08036 Rev. *C Page 23 of 30
AC Digital Block Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and 0°C <
T
A
< 70°C, or 3.0V to 3.6V and 0°C < T
A
< 70°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are
for design guidance only.
AC External Clock Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and 0°C <
T
A
< 70°C, or 3.0V to 3.6V and 0°C < T
A
< 70°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are
for design guidance only.
Table 21. AC Digital Block Specifications
Function Description Min Typ Max Unit Notes
Timer Capture Pulse Width 50
[11]
ns
Maximum Frequency, No Capture 49.92 MHz 4.75V < Vdd < 5.25V.
Maximum Frequency, With Capture 25.92 MHz
Counter Enable Pulse Width 50
[11]
ns
Maximum Frequency, No Enable Input 49.92 MHz 4.75V < Vdd < 5.25V.
Maximum Frequency, Enable Input 25.92 MHz
Dead
Band
Kill Pulse Width:
Asynchronous Restart Mode 20 ns
Synchronous Restart Mode 50
[11]
ns
Disable Mode 50
[12]
ns
Maximum Frequency 49.92 MHz 4.75V < Vdd < 5.25V.
CRCPRS
(PRS
Mode)
Maximum Input Clock Frequency 49.92 MHz 4.75V < Vdd < 5.25V.
CRCPRS
(CRC
Mode)
Maximum Input Clock Frequency 24.6 MHz
SPIM Maximum Input Clock Frequency 8.2 MHz Maximum data rate at 4.1 MHz due to
2 x over clocking.
SPIS Maximum Input Clock Frequency 4.1 MHz
Width of SS_ Negated Between Trans-
missions
50
[11]
ns
Trans-
mitter
Maximum Input Clock Frequency 24.6 MHz Maximum data rate at 3.08 MHz due to
8 x over clocking.
Receiver Maximum Input Clock Frequency 24.6 MHz Maximum data rate at 3.08 MHz due to
8 x over clocking.
Table 22. AC External Clock Specifications
Parameter Description Min Typ Max Unit Notes
F
OSCEXT
Frequency for USB Applications 23.94 24 24.06 MHz
Duty Cycle 47
50 53 %
Power - up to IMO Switch 150
μs
Note
11. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period).
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