Filter
Top Products
3. Parallel interface timing chart
BUSY
Approx. 5 µs Approx. 5 µS
ACKNLG
STROBE
I
I
I
Reception of data is controlled by the ACKNLG or BUSY signal. The
BUSY signal gose “HIGH” depending on whether the receive buffer is
available or not as follows:
• During the period from when power is turned on to when the printer
initialization completes.
• During the self test printing
• During data entry
•
in
the OFF-LINE state
• in the receive buffer full state.
• in a mechanical error state.
NOTE: •
When the remaining space in the receive buffer is
10 bytes
or
less, the printer becomes “receive buffer full”.
• If the remaining space in the receive buffer is 0 byte, the received
data will be ignored.
-70-