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Contents
xiv C141-E224
5.4.5 DMA data-out command protocol ................................................... 5-152
5.4.6 Native Command Queuing protocol ................................................ 5-153
5.5 Power-on and COMRESET.......................................................................... 5-156
CHAPTER 6 Operations ................................................................................. 6-1
6.1 Reset and Diagnosis.......................................................................................... 6-2
6.1.1 Response to power-on .......................................................................... 6-2
6.1.2 Response to COMRESET .................................................................... 6-4
6.1.2.1 Software settings preservation................................................... 6-5
6.1.2.2 COMRESET preservation requirements ................................... 6-5
6.1.3 Response to a software reset ................................................................ 6-7
6.2 Power Save ....................................................................................................... 6-8
6.2.1 Power save mode.................................................................................. 6-8
6.2.2 Power commands ............................................................................... 6-10
6.3 Power Save Controlled by Interface Power Management (IPM)................... 6-11
6.3.1 Power save mode of the interface ...................................................... 6-11
6.4 Read-ahead Cache .......................................................................................... 6-13
6.4.1 Data buffer structure........................................................................... 6-13
6.4.2 Caching operation............................................................................... 6-14
6.4.3 Using the read segment buffer ........................................................... 6-16
6.4.3.1 Miss-hit.................................................................................... 6-16
6.4.3.2 Sequential hit ........................................................................... 6-17
6.4.3.3 Full hit...................................................................................... 6-17
6.4.3.4 Partial hit ................................................................................. 6-19
6.5 Write Cache .................................................................................................... 6-20
6.5.1 Cache operation.................................................................................. 6-20