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Appendix A. Connector pin assignments
Figure 22 (Page 2 of 3). PCI connector pin assignments
Pin Signal I/O Pin Signal I/O
A2 +12 V DC NA B2 TCK O
A3 TMS O B3 Ground NA
A4 TDI O B4 TDO I
A5 +5 V DC NA B5 +5 V DC NA
A6 INTA# I B6 +5 V DC NA
A7 INTC# I B7 INTB# I
A8 +5 V DC NA B8 INTD# I
A9 Reserved NA B9 PRSNT1# I
A10 +5 V DC (I/O) NA B10 Reserved NA
A11 Reserved NA B11 PRSNT2 I
A12 Ground NA B12 Ground NA
A13 Ground NA B13 Ground NA
A14 +3.3V AUX NA B14 Reserved NA
A15 RST# O B15 Ground NA
A16 +5 V DC (I/O) NA B16 CLK O
A17 GNT# O B17 Ground NA
A18 Ground NA B18 REQ# I
A19 PCIPME NA B19 +5 V DC (I/O) NA
A20 Address/Data 30 I/O B20 Address/Data 31 I/O
A21 +3.3 V DC NA B21 Address/Data 29 I/O
A22 Address/Data 28 I/O B22 Ground NA
A23 Address/Data 26 I/O B23 Address/Data 27 I/O
A24 Ground I/O B24 Address/Data 25 NA
A25 Address/Data 24 I/O B25 +3.3 V DC NA
A26 IDSEL O B26 C/BE 3# I/O
A27 +3.3 V DC NA B27 Address/Data 23 I/O
A28 Address/Data 22 I/O B28 Ground NA
A29 Address/Data 20 I/O B29 Address/Data 21 I/O
A30 Ground I/O B30 Address/Data 19 NA
A31 Address/Data 18 I/O B31 +3.3 V DC NA
A32 Address/Data 16 I/O B32 Address/Data 17 I/O
A33 +3.3 V DC NA B33 C/BE 2# I/O
A34 FRAME# I/O B34 Ground NA
A35 Ground NA B35 IRDY# I/O
A36 TRDY# I/O B36 +3.3 V DC NA
A37 Ground NA B37 DEVSEL# I/O
A38 STOP# I/O B38 Ground NA
A39 +3.3 V DC NA B39 LOCK# I/O
A40 SDONE I/O B40 PERR# I/O
A41 SBO# I/O B41 +3.3 V DC NA
A42 Ground NA B42 SERR# I/O
A43 +3.3 V DC NA B43 +3.3 V DC NA
A44 C/BE(1)# I/O B44 C/BE 1# I/O
30 Technical Information Manual