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Xeon™ Processor, Intel
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E7520 Chipset, Intel
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6300ESB ICH Development Kit User’s Manual 23
Jumpers and Headers
FSB Clock Frequency
Override
(Host Clock Jumpers)
BSEL1: J4H4
BSEL0: J4J3
BSEL0 BSEL1 SPEED
BSEL0: 1-2
BSEL1: 1-2
1-2 1-2 Normal
2-3 2-3 RSVD
2-3 Open 133 MHz
Open Open 167 MHz
Open 1-2 200 MHz
SMI Inject J4H5
Inject SMI Signal
Do Not Install Jumper
Open
FORCEPR0 inject J4H6
Inject FORCEPR0 Signal
Do Not Install Jumper
Open
STPCLK Inject J4J1
Inject STPCLK Signal
Do Not Install Jumper
Open
FORCEPR1 inject J4J2
Inject FORCEPR1 Signal
Do Not Install Jumper
Open
CPU1 Present Override J4J5
Override VRM disable if CPU1 is not present
1-2: Override
Open: Normal
Open
BSEL Match Override J4J7
Override VRM disable if BSELs do not match
1-2: Override
Open: Normal
Open
CPU1 VID J4K1
1-2: VID[5]
3-4: VID[4]
5-6: VID[3]
7-8: VID[2]
9-10: VID[1]
11-12: VID[0]
As
Required
CPU1 VID Override J4K2
Manual VID select
1-2: Manual select
Open: CPU select
Open
MCH SMBus Header J5D3
Access to MCH SMbus
Do not install Jumper
1: MCH _SMBDAT
2. Ground
3. MCH_SMBCLK
Open
PLLS0 J5E112
See MCH Documentation for alternative Gear
Ratios for MCH FSB/Memory
Short
Intel
®
6300ESB I/O
Controller Top Swap (FWH
Memory Swap)
J5F1
Intel 6300ESB I/O Controller Top Swap
1-2: Top Swap
Open: Normal
Open
PLLS1 J5F113
See MCH Documentation for alternative Gear
Ratios for MCH FSB/Memory
Short
Table 4. Jumper Settings (Sheet 2 of 3)
Jumper Name Ref Des Description/Settings
Default
Position