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Schematic Diagrams
B - 6 Cantiga 2/6 PEG
B.Schematic Diagrams
Cantiga 2/6 PEG
1.05VM
1.05VM
3.3VS
1.5V
3.3VS
1.5V
1.5V
3.3VS
3.3VS
3.3VS
1.5V
1.05VM
3.3VS
PM_DPRSLPVR15,35
DMI_TXP3 14
CL_DATA0 15
PLT_RST#14,22,37
C L_R ST#0 15
M_O DT1 10
DMI_RXN 2 14
M_O DT2 11
M_O DT3 11
DMI_RXP0 14
M_CLK_DDR0# 10
DMI_TXN 1 14
M_C KE1 1 0
MCH_BSEL24
M_O DT0 10
CL_CLK0 15
DMI_TXN 2 14
M_CLK_DDR2# 11
PM_EXTTS1#11
M_CLK_DDR1# 10
M_C S2# 11
DMI_RXP2 14
M_CLK_DDR3 11
MCH_BSEL14
M_C S1# 10
M_CLK_DDR1 10
DMI_TXN 3 14
DMI_TXP1 14
DMI_TXP2 14
DMI_TXP0 14
DMI_RXN 3 14
PM_EXTTS0#10
M_C S0# 10
MPWROK 15
DMI_RXP3 14
MCH_BSEL04
M_CLK_DDR0 10
DMI_RXP1 14
D ELAY_PWRGD15,35
M_CLK_DDR2 11
M_C KE3 1 1
M_C KE0 1 0
MCH_ICH_SYNC# 15
M_C KE2 1 1
DMI_TXN 0 14
M_CLK_DDR3# 11
DMI_RXN 1 14
M_C S3# 11
PE G_RXP[0..15]37
PEG_TXN[0..15]37
PEG_RXN[0..15]37
PEG_TXP[0..15]37
DMI_RXN 0 14
CLK_PCIE_3GPLL 18
CLK_PC IE_3GPLL# 18
PM_THR MTRIP#2,13
H_DPRSTP#2,13,35
PM_BMBUSY#15
DDR3_DRAMRST# 10,11
GM_LVDS_L0N12
GM_LVDS_L1N12
GM_LVDS_L2N12
GM_LVDS_L2P12
GM_LVDS_L1P12
GM_LVDS_L0P12
GM _LV DS_U 2N12
GM _LV DS_U 1N12
GM _LV DS_U 0N12
GM _LV DS_U 2P12
GM _LV DS_U 1P12
GM _LV DS_U 0P12
GM_LVDS_LCLKN12
GM_LVDS_LCLKP12
GM_LVDS_UCLKN12
GM_LVDS_UCLKP12
G M_EDI D_CLK12
G M_EDI D_DATA12
GM_ENAVDD12
GM_BLON12
GM_DAC_B28
GM_DAC_G28
GM_DAC_R28
GM_DACA_HSYNC28
GM_D ACA_VS YN C28
GM_DDC_CLK28
GM_DDC_DATA28
DFGT_VID_0 30
DFGT_VID_1 30
DFGT_VID_2 30
DFGT_VID_3 30
DFGT_VID_4 30
DF GT_VR_EN 30
CLK_DREF 18
CLK_DREF# 18
CLK_DREF_SS 18
CLK_DREF_SS# 18
AZ_BITCLK 13,25,28
AZ_RST# 13,25,28
AZ_SDOUT 13,25,28
AZ_SY NC 13,25,28
AZ_SDIN2 13
SM_PWROK 31
1.05VS2,3,4,9,13,16,23,32
3.3VS2,3,9,12,13,14,15,16,19,20,21,22,23,24,25,28,30,33,35,37
1.5V7,9,10,11,28,31
MCH_CFG_20
MCH_CFG_12
SM_RCOMP_VOL
MCH_CFG_9
MCH_CFG_5
MCH_CFG_19
MCH_CFG_16
M_ VR EF _MCH
SDV O_CT_DATA
Z0545
Z0531
MCH_CFG_19
Z0543
Z0530
PM_EXTTS1#
Z0533
Z0528
Z0548
Z0537
SM_R COMP_VOL
Z0526
Z0529
MCH_CFG_6
Z0546
Z0539
Z0532
Z0549
Z0544
Z0540
Z0524
MCH_C LKRE Q#
Z0538
Z0535
Z0547
MCH_CFG_13
Z0523
Z0563
Z0527
Z0551
Z0550
PM_EXTTS0#
Z0525
MCH_CFG_16
MCH_CFG_5
MCH_CFG_20
Z0542
Z0536
Z0501
MCH_CFG_12
MCH_C FG_ 1 3
Z0541
MCH_CFG_9
PEG_TXN[0..15]
PEG_RXP[0..15]
PEG_RXN[0..15]
Z0587
SDV O_CT_CLK
GTP0
GTP1
GTP2
GTP3
GTP4
GTP5
GTP6
GTP7
GTP8
GTP9
GTP10
GTP11
GTP12
GTP13
GTP14
GTP15
GTN0
GTN1
GTN2
GTN3
GTN4
GTN5
GTN6
GTN7
GTN8
GTN9
GTN10
GTN11
GTN12
GTN13
GTN14
GTN15
SM_R COMP_VOH
SM_RCOMP_VOH
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
Z0502
Z0503
Z0504
Z0505
Z0506
Z0507
Z0508
Z0509
Z0510
Z0511
Z0512
Z0513
Z0514
Z0515
Z0516
Z0517
Z0518
Z0519
Z0520
Z0521
Z0522
Z0552
Z0553
Z0554
Z0555
Z0556
Z0557
Z0558
Z0559
Z0560
SM_RCOMP
SM_R COMP#
SM_RCOMP#
SM_R COMP
Z0561
Z0562
Z0564
Z0565
MCH_TSATN#
Z0534
Z0577
Z0579
Z0580
Z0576
Z0575
Z0574
Z0573
L_CTRL_DATA
Z0572
L_CTRL_CLK
Z0581
Z0583
Z0582
Z0586
Z0585
Z0584
PM_EXTTS1#
PM_EXTTS0#
M_VREF_MCH
MCH_C FG_ 6 Z0567
Z0568
Z0569
Z0570
Z0571
Z0588
Z0589
Z0590
Z0591
Z0592
Z0593
Z0578
Z05101
Z05100
Z0599
Z0598
Z05102
Z05103
Z05104
Z05105
Z05106
Z05107
Z05110
Z05109
Z05108
Z05111
Z05112
Z05113
Z0596
Z0595
Z0594
Z0597
CLK_DREF
CLK_DREF#
CLK_DREF_SS
CLK_DREF_SS#
GM_ENAVDD
GM_BLON
MCH_CLKREQ#
C703
2.2u_6.3V_06
C583 0.1u_10V_04
C274 *0.1u_10V_04
R67 *10K_04
R63 *10K_04
C616 0.1u_10V_04
C590 0.1u_10V_04
C356 *0.1u_10V_04
R111
1K_1%_04
R129 499_1%_04
C690
0.01u_50V_04
R100
*2.21K_1%_06
R75 75_04
R65 0_04
R64 10K_04
C114 *0.01u_16V_04
R76 75_04
R524
3.01K_1%_04
LVDS
PCI-EXPRESS GRAPHICS
TV
VGA
U27C
CAN TIGA
T37
T36
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
J41
Y40
M40
M42
R48
N38
T40
U37
U40
M46
AA46
AA37
AA40
AD43
AC46
M47
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
M32
M33
K33
J33
M29
C44
B43
E37
E38
C41
C40
H47
E46
G40
D45
F40
B37
A37
A41
H38
G37
G38
F37
G32
F25
H25
K25
H24
E28
H32
J32
G28
J29
E29
J28
G29
L29
H48
B42
L32
C31
E32
A40
B40
J37
K37
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_R X#_10
PEG_R X#_11
PEG_R X#_12
PEG_R X#_13
PEG_R X#_14
PEG_R X#_15
PE G_RX_0
PE G_RX_1
PE G_RX_2
PE G_RX_3
PE G_RX_4
PE G_RX_5
PE G_RX_6
PE G_RX_7
PE G_RX_8
PE G_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_10
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_1
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX#_2
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVD SA_CLK#
LVDSA_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA_1
LVDSA_DATA_2
LVD SB_CLK#
LVDSB_CLK
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA_1
LVDSB_DATA_2
L_BKLT_EN
TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN
CRT_BLUE
CRT_DDC_CLK
CRT_DDC_DATA
CRT_GREEN
CRT_HSYNC
CRT_TVO_IREF
CRT_RED
CRT_IRTN
CRT_VSYNC
LVDSA_DATA_0
LVDSB_DATA_0
L_BKLT_CTRL
TV_DCONSEL_0
TV_DCONSEL_1
LVDSA_DATA#_3
LVDSA_DATA_3
LVDSB_DATA#_3
LVDSB_DATA_3
R432 *2.4K_1%_04
R531
*20_1%_06
R353 *30.1_1%_04
R84 *150_04
R521
80.6_1%_04
R62 *0_04
R61 *0_04
C581 0.1u_10V_04
R101 0_04
C577 0.1u_10V_04
R413 * 0_04
C608 0.1u_10V_04
R414 * 0_04
C175
*2.2u_6.3V_06
C588 0.1u_10V_04
R82 *150_04
R103
*4.02K_1%_06
R83 *150_04
R135
10K_1%_04
R136
10K_1%_04
C610 0.1u_10V_04
C174
*2.2u_6.3V_06
R97
*2.21K_1%_06
C609 0.1u_10V_04
R113
511_1%_04
C613 0.1u_10V_04
C586 0.1u_10V_04
R52 56_04
C554 *10p_NPO_04
R92
*2.21K_1%_06
R17 *0_04
R81 0_04
C618 0.1u_10V_04
R18 *0_04
R19 *0_04
R449 49.9_1%_04
R354 *30.1_1%_04
C580 0.1u_10V_04
R20 *0_04
R21 *0_04
R99
*4.02K_1%_06
C617 0.1u_10V_04
C612 0.1u_10V_04
R424
*2.21K_1%_06
R48 *0_04
R532
80.6_1%_04
R128 *0_04
R522
*20_1%_06
C591 0.1u_10V_04
R122 100_1%_04
R416 *33_04
R530
1K _1%_04
C611 0.1u_10V_04
R46 *0_04
C589 0.1u_10V_04
C620 0.1u_10V_04
C576 0.1u_10V_04
R98 10K_04
R365 * 0_04
C702
2.2u_6.3V_06
R364 * 0_04
C605 0.1u_10V_04
R45 100K_04
R47 100K_04
R356 * 0_04
R376 * 0_04
R355 * 0_04
R373 * 0_04
R520
1K _1%_04
R368 * 0_04
R419 *33_04
R371 * 0_04
R374 * 0_04
R22 *0_04
R418 *33_04
R366 * 0_04
R105
*2.21K_1%_06
R417 *33_04
R362 * 0_04
R358 * 0_04
C578 0.1u_10V_04
R415 *33_04
R360 * 0_04
R361 * 0_04
C614 0.1u_10V_04
C607 0.1u_10V_04
R359 * 0_04
C587 0.1u_10V_04
R66 10K_04
R357 * 0_04
C579 0.1u_10V_04
C584 0.1u_10V_04
C585 0.1u_10V_04
C705
0.01u_50V_04
PM
MISC
NC
DDR CLK/ CONTROL/COMPENSATIONCLK
DMI
CFG
RSVD
GRAPHICS VIDMEHDA
ME JTAG
U27B
CANTIGA
AP24
AT21
AV24
AR24
AR21
AU24
BC28
AY28
AY36
BB36
BA17
AY16
AV16
AR13
BC36
BD17
AY17
BF15
AY13
BG22
BH21
P29
R28
P25
T25
R25
T28
P20
P24
C25
N24
M2 4
E21
C23
C24
N21
P21
T21
R20
M2 0
L21
H21
R29
N33
P32
AT40
AT11
B38
A38
E41
F41
AE41
AE37
AE47
AH39
AE40
AE38
AE48
AH40
AE35
AE43
AE46
AH42
AD35
AE44
AF46
AH43
AL34
AN35
AK34
AM35
BG23
BF23
BH18
BF18
B7
AU20
AV20
AY21
AH9
AH10
AH12
AH13
M3 6
N36
R33
T33
B33
B32
G33
F33
C34
BF28
BH28
T20
R32
K12
AH37
AH36
AN36
AJ35
AH34
BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
G36
E36
K36
T24
H36
B12
E43
F43
BH3
E33
B31
N28
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
AV42
AR36
BF17
M1
B28
B30
B29
C29
A28
M28
B2
SA_CK_0
SA_CK_1
SB_CK_0
SA_C K#_0
SA_C K#_1
SB_C K#_0
SA_CKE _0
SA_CKE _1
SB_CKE _0
SB_CKE _1
SA_C S#_0
SA_C S#_1
SB_C S#_0
SB_C S#_1
SM_DRAMRST#
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
SM_RC OMP
SM_RCOMP#
CFG_18
CFG_19
CFG_2
CFG_0
CFG_1
CFG_20
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
PM_SYN C#
PM_E XT_TS#_0
PM_E XT_TS#_1
PWR OK
RS TIN #
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF _S SCLK
DPLL_REF_SSCLK#
DM I_RXN_0
DM I_RXN_1
DM I_RXN_2
DM I_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN _0
DMI_TXN _1
DMI_TXN _2
DMI_TXN _3
DMI_TXP _0
DMI_TXP _1
DMI_TXP _2
DMI_TXP _3
ME _J TA G_T CK
ME _J TA G_T DO
ME _J TA G_T DI
ME _J TA G_T M S
RS VD22
RS VD23
RS VD24
RS VD25
PM_DPRSTP#
SB_CK_1
SB_C K#_1
RS VD20
RS VD5
RS VD6
RS VD7
RS VD8
RS VD1
RS VD2
RS VD3
RS VD4
GFX_VID _0
GFX_VID _1
GFX_VID _2
GFX_VID _3
GFX_VR_E N
SM_RCOMP_VOH
SM_RCOMP_VOL
THER MTRIP#
DP RSLPVR
RS VD9
CL_CLK
CL_DATA
CL_PWRO K
CL_RS T#
CL_VREF
NC _1
NC _2
NC _3
NC _4
NC _5
NC _6
NC _7
NC _8
NC _9
NC _10
NC _11
NC _12
NC _13
NC _14
NC _15
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKR EQ#
RS VD14
ICH_SYN C#
TSATN#
PE G_CLK#
PEG_CLK
NC _16
GFX_VID _4
RS VD15
DDPC_CTRLCLK
NC _17
NC _18
NC _19
NC _20
NC _21
NC _22
NC _23
NC _24
NC _25
SM_VR EF
SM_PWROK
SM_REXT
RS VD17
HDA_BCLK
HD A_RS T#
HDA_SDI
HDA_SDO
HD A_SYN C
DD PC_CTR LDATA
RS VD21
R86 0_04
R94
*2.21K_1%_06
R85 0_04
C582 0.1u_10V_04
R87 0_04
R91 0_04
C138
0.1u_10V_04
C619 0.1u_10V_04
C606 0.1u_10V_04
C354 *0.1u_10V_04
C615 0.1u_10V_04
C315 *0.1u_10V_04
R74 75_04
SDVO/PCIE
Concurrent
mode
DMI lane reversal
FSB Dynamic ODT
clock un-gating
DMI X2 select
PCI express graphics lane
reverse option for layout
convenience
EVT
2007/12/15
EVT
2007/12/15
EVT
2007/12/15
Sheet 5 of 42
Crestline 2/6 PEG