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14 Intel
®
NetStructure™ MPCHC5525 System Master Processor Board IPMI Reference Driver User’s Guide
IBMU Functionality
Whereas the Keyboard Controller Style (KCS0) interface and the Intelligent Peripheral
Management Buses (IPMB) allow communication between components within one chassis, the
KCS0 interface and ICMB connect the devices of one chassis with another chassis. The IPMB and
ICMB buses are IBMU powered and will be available even if the CPU board is not powered.
Note: On some boards the sensors on the sensor bus are not powered by the IBMU. This means that if the
power supply is interrupted, the sensor status at the time of power supply interruption is logged but
the current sensor value cannot be read. The current sensor value can be read as soon as the board
power is up again. For information on which sensor on the sensor bus is not powered by the IBMU,
refer to the CPU board’s TPS.
The following sections describe which device is connected to which bus and give simple examples
for communication within a chassis and between two chassis.
2.2.1 Communication Within a Chassis
Communication within a chassis is possible via IPMB and the sensor bus which are both I²C-based
buses. Force Computers IBMU offers an IPMB0 and IPMB1 bus. The purpose of each bus is as
follows:
• IPMB0 – Allows communication between BMC and IPMI controllers (PMs) on CPU boards.
• IPMB1 – Allows communication between:
— BMC and IPMI controller of PMs like PSUs, fan trays, etc.
— BMC and devices in the system that are not equipped with an IPMI controller
• Sensor bus – A private bus that allows communication between the BMC and on-board
temperature sensor
The devices are connected to the IPMB1 via the Intel
®
NetStructure™ MPRTM4848 Rear
Transition Board for the respective CPU board. The IPMB1 signals are routed from the IPMI
controller on the CPU board to the RTB via the backplane and are then available at an IPMB1
connector of the RTB. This IPMB1 connector is located on-board the RTBs.
Figure 5. Communication within a Chassis