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Chapter 4
Functional Details
DIO signals
All digital outputs and inputs on the PCI-DIO24 are CMOS TTL. Voltages and currents associated with
external devices are usually far greater than can be supplied from a PCI-DIO24.
Caution! Direct connections to high-current/high voltage devices will damage the board.
The 82C55 digital I/O chip initializes all ports as inputs on power-up and reset. The state of the digital I/O lines
is not defined as either logic high or logic low when in input mode. Input devices connected to the PCI-DIO24
board may detect either a high or a low, and therefore may be turned off or on at power-up.
Signal level control
All I/O bits are set to a high impedance input mode on power up and reset. To prevent unwanted signal levels,
and to drive all inputs on the device you are controlling to a known state after power up or reset, install pull-up
or pull-down resistors.
A pull-up resistor pulls all digital pins up to +5 V (high logic level). A pull-down resistor pulls all digital pins
down to 0 V (low logic level).
The PCI-DIO24 has open locations where you can install a 2.2 KΩ, eight-resistor single inline package (SIP)
resistor network for each port. The SIP is made up of eight 2.2 KΩ resistors. One side of each resistor is
connected to a single common point and brought out to a pin. The common line is marked with a dot or line at
one end of the SIP. The remaining resistor ends are brought out to the other eight pins (see ). Figure 4-1
Figure 4-1. Eight-resistor SIP schematic
2.2KOhm SIP
Dot
(LO or HI)
I/O Lines
Install the SIP on the PCI-DIO24 board at the locations labeled PORT A, PORT B and PORT C (adjacent to
the 37-pin connector). shows a schematic of an SIP installed in both the pull-up and pull-down
positions.
Figure 4-2
4-1