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CHAPTER 10 8-BIT TIMER/EVENT COUNTERS 5 AND 6
10.3 8-Bit Timer/Event Counters 5 and 6 Control Registers
The following three types of registers are used to control the 8-bit timer/event counters 5 and 6.
• Timer clock select register 5 and 6 (TCL5, TCL6)
• 8-bit timer mode control registers 5 and 6 (TMC5, TMC6)
• Port mode register 10 (PM10)
(1) Timer clock select register 5 (TCL5)
This register sets count clocks of 8-bit timer register 5.
TCL5 is set with an 8-bit memory manipulation instruction.
RESET input sets TCL5 to 00H.
Figure 10-3. Timer Clock Select Register 5 Format
Note When clock is input from the external, timer output (PWM output) cannot be used.
Caution When rewriting TCL5 to other data, stop the timer operation beforehand.
Remarks 1. f
XX : Main system clock frequency (fX or fX/2)
2. fX : Main system clock oscillation frequency
3. TI5 : 8-bit timer register 5 input pin
4. MCS : Bit 0 of oscillation mode selection register (OSMS)
5. Figures in parentheses apply to operation with f
X = 5.0 MHz.
0 0 0 0 TCL53 TCL52 TCL51 TCL50
76543210Symbol
TCL5
TCL53 TCL52 TCL51 TCL50
0 0 0 0 TI5 falling edge
Note
0 0 0 1 TI5 rising edge
Note
0100
fXX
fX
(Setting prohibited)
fX/2 (2.5 MHz)0101
fXX/2
fX/2 (2.5 MHz)
fX/2
2
(1.25 MHz)
0110
f
XX/2
2
fX/2
2
(1.25 MHz)
fX/2
3
(625 kHz)0111
fXX/2
3
fX/2
3
(625 kHz)
fX/2
4
(313 kHz)1000
fXX/2
4
fX/2
4
(313 kHz)
fX/2
5
(156 kHz)
1001
fXX/2
5
fX/2
5
(156 kHz)
fX/2
6
(78.1 kHz)
1010
f
XX/2
6
fX/2
6
(78.1 kHz)
fX/2
7
(39.1 kHz)1011
fXX/2
7
fX/2
7
(39.1 kHz)
fX/2
8
(19.5 kHz)1100
fXX/2
8
fX/2
8
(19.5 kHz)
fX/2
9
(9.8 kHz)
1101
fXX/2
9
fX/2
9
(9.8 kHz)
fX/2
10
(4.9 kHz)1110
f
X/2
11
1111fXX/2
11
fX/2
11
(2.4 kHz) (1.2 kHz)
MCS = 1
8-bit Timer Register 5 Count Clock Selection
MCS = 0
Other than above Setting prohibited
FF52H 00H R/W
Address After Reset R/W
2f
XX
(5.0 MHz)
fX (5.0 MHz)