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CHAPTER 10 WATCH TIMER
10.2 Watch Timer Configuration
The watch timer consists of the following hardware.
Table 10-2. Watch Timer Configuration
Item Configuration
Counter 5 bits × 1
Timer clock select register 2 (TCL2)
Watch timer mode control register (TMC2)
10.3 Watch Timer Control Registers
The following two types of registers are used to control the watch timer.
• Timer clock select register 2 (TCL2)
• Watch timer mode control register (TMC2)
(1) Timer clock select register 2 (TCL2) (Refer to Figure 10-2.)
This register sets the watch timer count clock.
TCL2 is set with an 8-bit memory manipulation instruction.
RESET input sets TCL2 to 00H.
Remark Besides setting the watch timer count clock, TCL2 sets the watchdog timer count clock and buzzer
output frequency.
Control register