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123456
SW2
ON
123456
SW2
Slide position 6 of SW2 toward the top of the ES-100D to enable the
interrupt status register, or toward the bottom of the ES-100D to disable it.
Scratchpad Register
Interrupt Status Register
Figure 7 --- Enabling the Interrupt Status Register
When a hardware interrupt occurs, reading the interrupt status register
will return the interrupt status of the entire ES-100D, as shown in Figure 8.
Individual bits are cleared as the interrupting ports are serviced. The interrupt
service routine must ensure that the interrupt status register reads zero before
exiting, or the ES-100D will be unable to signal subsequent interrupts.
An I/O write to the interrupt status register will cause another hardware
interrupt to be generated if the interrupt status register is non-zero. The value
written is ignored and has no effect on the contents of the interrupt status register.
1 if interrupt pending on Serial 10
1 if interrupt pending on Serial 21
1 if interrupt pending on Serial 32
1 if interrupt pending on Serial 43
1 if interrupt pending on Serial 54
1 if interrupt pending on Serial 65
1 if interrupt pending on Serial 76
1 if interrupt pending on Serial 87 (MSB)
DESCRIPTIONBIT
Figure 8 --- Interrupt Status Register contents
Quatech ES-100D User's Manual 7