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KS57C2308/P2308/C2316/P2316 SAM47 INSTRUCTION SET
5-51
DI — Disable Interrupts
DI
Operation: Operand Operation Summary Bytes Cycles
– Disable all interrupts 2 2
Description: Bit 3 of the interrupt priority register IPR, IME, is cleared to logic zero, disabling all interrupts.
Interrupts can still set their respective interrupt status latches, but the CPU will not directly
service them.
Operand Binary Code Operation Notation
– 1 1 1 1 1 1 1 0
IME ← 0
1 0 1 1 0 0 1 0
Example: If the IME bit (bit 3 of the IPR) is logic one (e.g., all instructions are enabled), the instruction
DI
sets the IME bit to logic zero, disabling all interrupts.