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ATA REGISTERS SSD-CXXX(I)-3600 DATA SHEET
SILICONSYSTEMS PROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
3600C-04DSR PAGE 56 FEBRUARY 2, 2009
DEVICE CONTROL REGISTER
The Device Control register is used to control the interrupt request and issue
ATA software resets.
Table 44: Device Control Register
Operation
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Write ----1SRSTnIEN0
Bit(s) Description
7-4 Reserved bits.
3 Always set to 1.
2 Software Reset (SRST). When set, resets the ATA software.
1 Interrupt Enable (nIEN). When set, device interrupts are disabled.
There is no function in the memory-mapped mode.
0 Always set to 0.