SOYO SY-5SSM Computer Hardware User Manual


 
BIOS Setup Utility SY-5SSM & SY-5SSM/5
51
CHIPSET FEATURES SETUP (Continued)
CHIPSET
FEATURES
Setting Description Note
Disabled Default
Enabled Some interface cards will
map their ROM address to
this area. If this occurs,
select [Enabled] in this field.
Memory Hole
At 15M-16M
0.5-8 MB
Disabled Default
PCI Post
Write Buffer
Enabled
Enable/disable PCI post
write buffer.
Disabled Default
PCI Delayed
Transaction
Enabled
The chipset has an
embedded 32-bit posted
write buffer to support delay
transactions cycles. Select
Enabled to support
compliance with PCI
specification version 2.1.
Disabled Default
0.25%(Cntr) When using Spread
Spectrum 0.25%(Cntr) for
FCC or DOC testing.
Spread
Spectrum
0.50%(Down) When using Spread
Spectrum 0.50%(Down) for
FCC or DOC testing.