Texas Instruments TMS320C6452 DSP Network Card User Manual


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1.3FunctionalBlockDiagram
Slave
config
bus
Interface
Master
config
Interface
bus
VLYNQmodule
VLYNQregister
access
CPU/EDMA initiated
transfersto
remotedevice
Offchip
(remote)
deviceaccess
CPU/EDMA
memory
System
VSCRUN
VCLK
VRXDx
VTXDx
GEMINTC
VLQINT
Inthesesignals,
x=anumberfrom3to0
1.4IndustryStandard(s)ComplianceStatement
Introduction
•SymmetricOperation:
–TxpinsonfirstdeviceconnecttoRxpinsonseconddeviceandviceversa.
–Datapinwidthsareautomaticallydetectedafterreset(includingconnectionstolegacyVLYNQ
devices).
–Requestpackets,responsepackets,andflowcontrolinformationareallmultiplexedandsent
acrossthesamephysicalpins.
–SupportsbothHost/PeripheralandPeertoPeercommunicationmodels.
•Simpleblockcodepacketformatting(8b/10b).
•Supportsin-bandandflowcontrol:
–Noextrapinsareneeded.
–Allowsthereceivertomomentarilythrottlethetransmitterbackwhenoverflowisabouttooccur.
–Usesthespecialbuilt-inblockcodecapabilitytointerleaveflowcontrolinformationseamlesslywith
userdata.
•Automaticpacketformattingoptimizations.
•Internalloopbackmodesareprovided.
•ConnectstolegacyVLYNQdevices.
Figure1showsafunctionalblockdiagramoftheVLYNQport.
Figure1.VLYNQPortFunctionalBlockDiagram
VLYNQisaninterfacedefinedbyTexasInstrumentsanddoesnotconformtoanyotherindustrystandard.
SPRUF89–October2007VLYNQPort11
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