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3VLYNQPortRegisters
VLYNQPortRegisters
Table5describestheaddressspacefortheVLYNQregistersandmemory.
Table5.VLYNQRegisterAddressSpace
BlockNameStartAddressEndAddressSize
VLYNQControlRegisters38000000h380001FFh512bytes
VLYNQRemoteMemoryMap38000200h38FFFFFFh64M-512bytes
Table6liststhememory-mappedregistersfortheVLYNQportcontroller.Seethedevice-specificdata
manualforthememoryaddressoftheseregisters.
Thefirst128bytesmaptotheVLYNQconfigurationregistersthataremaintainedbythelocal(device)
VLYNQregistercontrolmodulewhilethesecond128bytesmaptotheremoteconfigurationregistersthat
arephysicallylocatedintheremotedevicelinkedbytheVLYNQserialinterface.Anyaccesstothe
secondsetofregisterscausesVLYNQtoissueareadorwriteVLYNQpackettobetransmittedandonly
completesifalinkisestablishedbetweenthetwodevices.
Table6.VLYNQPortControllerRegisters
OffsetAcronymRegisterDescriptionSection
0hREVIDRevisionRegisterSection3.1
4hCTRLControlRegisterSection3.2
8hSTATStatusRegisterSection3.3
ChINTPRIInterruptPriorityVectorStatus/ClearRegisterSection3.4
10hINTSTATCLRInterruptStatus/ClearRegisterSection3.5
14hINTPENDSETInterruptPending/SetRegisterSection3.6
18hINTPTRInterruptPointerRegisterSection3.7
1ChXAMTransmitAddressMapRegisterSection3.8
20hRAMS1ReceiveAddressMapSize1RegisterSection3.9
24hRAMO1ReceiveAddressMapOffset1RegisterSection3.10
28hRAMS2ReceiveAddressMapSize2RegisterSection3.11
2ChRAMO2ReceiveAddressMapOffset2RegisterSection3.12
30hRAMS3ReceiveAddressMapSize3RegisterSection3.13
34hRAMO3ReceiveAddressMapOffset3RegisterSection3.14
38hRAMS4ReceiveAddressMapSize4RegisterSection3.15
3ChRAMO4ReceiveAddressMapOffset4RegisterSection3.16
40hCHIPVERChipVersionRegisterSection3.17
44hAUTNGOAutoNegotiationRegisterSection3.18
48hMANNGOManualNegotiationRegisterSection3.19
4ChNGOSTATNegotiationStatusRegisterSection3.20
60hINTVEC0InterruptVector3-0Section3.21
64hINTVEC1InterruptVector7-4Section3.22
SPRUF89–October2007VLYNQPort25
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