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VLYNQPortRegisters
Table27.InterruptVector3-0Register(INTVEC0)FieldDescription(continued)
BitFieldValueDescription
6INTTYPE0InterruptType0
0InterruptVector0islevelsensitive
1InterruptVector0isPulse
5INTPOL0InterruptPolarity0
0InterruptVector0isactivehigh
1InterruptVector0isactivelow
4-0INTVEC00-1FhInterruptVector0.Thisfieldmapsthevlynq_int_i[0]pintoabitintheInterruptPending/Set
Register.
SPRUF89–October2007VLYNQPort41
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