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Timer Operation
3 Timer Operation
The following sections describe the overall timer operation. For specific details on the watchdog timer
operation, see Section 4.
3.1 Timer Mode Selection
The timer can be configured as a 64-bit general-purpose timer or dual 32-bit timers (chained or
unchained), or a watchdog timer using the timer mode (TIMMODE) bits in timer global control register
(TGCR) (see Table 2). At reset, the timer is configured as a 64-bit GP timer as default. These bits can be
written to select dual 32-bit timers (chained or unchained) or a watchdog timer function as shown in
Table 2.
Table 2. Timer Mode Selection
TIMMODE Bits
Bit 3 Bit 2 Timer Mode
0 0 64-bit general-purpose timer (default)
0 1 Dual 32-bit timers (unchained)
1 0 64-bit watchdog timer
1 1 Dual 32-bit timers (chained)
3.2 Timer Enabling
In the 64-bit timer mode or the dual 32-bit timers chained mode, the timer can be enabled by setting the
TIMLORS and TIMHIRS bits in the timer global control register (TGCR) to 1 and setting the
ENAMODE_LO bits in the timer control register (TCR) to 01b or 10b.
In the dual 32-bit timers unchained mode, the 32-bit timer (TIMLO) can be enabled by setting the
TIMLORS bit in TGCR to 1 and the ENAMODE_LO bits in TCR to 01b or 10b. The 32-bit timer with
prescaler (TIMHI) can be enabled by setting the TIMHIRS bit in TGCR to 1 and the ENAMODE_HI bits in
the timer control register (TCR) to 01b or 10b.
Table 3 is a summary of timer enabling.
Table 3. Timer Enabling
TCR ENAMODE bits TGCR
Timer Mode Bit 23 Bit 22 Bit 7 Bit 6 TIMHIRS TIMLORS Timer Status
64-bit general-purpose X X 0 0 X X Disabled (default)
X X 0 1 1 1 Enabled one time
X X 1 0 1 1 Enabled
continuously
Dual 32-bit chained X X 0 0 X X Disabled (default)
X X 0 1 1 1 Enabled one time
X X 1 0 1 1 Enabled
continuously
Dual 32-bit unchained 0 0 0 0 X X Both timers disabled
(default)
32-bit timer X X 0 1 X 1 32-bit timer enabled
one time
X X 1 0 X 1 32-bit timer enabled
continuously
32-bit timer with prescaler 0 1 X X 1 X 32-bit timer enabled
one time
1 0 X X 1 X 32-bit timer enabled
continuously
13
SPRU818B–December 2005–Revised September 2010 C6472/TCI648x 64-Bit Timer
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