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TX19
Family
Features of TX19 Family
High-performance multiply-accumulate (MAC) unit
A 32-bit x 32-bit + 64-bit operation can be executed in one clock cycle.
Suitable for real-time control
Dedicated interrupt controller
Simplified register stacking using shadow registers (TX19A)
Code efficiency of the highest standard in the industry
16-bit instruction set for higher code efficiency
TX19A features an enhanced 16-bit instruction set
(with extra instructions to enable bit manipulation, etc.).
NANO FLASH
TM
realizing a significant improvement over conventional Flash memory
Product line-up including the industry’s largest memory capacity (2MB) device
Low power consumption equivalent to the mask ROM version
High-speed programming capability ideal for development and mass production
High-speed computational capability
High-speed
computational
capability
Quick
interrupt
response
Excellent
code
efficiency
NANO
FLASH
TM
memory
CPU core ideal
for embedded
applications
TX19
1) 32-bit x 32-bit 2 clock cycles
2) 64-bit + 64-bit
4 clock cycles
Ideal for applications requiring
high-speed computations
Total: 6 clock cycles
Can be executed in one clock cycle
by the dedicated MAC unit.
MULT r2, r6, r7
MFHI r3
ADDU r10, r2, r4
SLTU r11, r10, r2
ADD(U) r11, r11, r3
ADD(U) r11, r11, r5
32-bit x 32-bit + 64-bit
MADD r4, r6, r7
The high-performance MAC unit enables a 32-bit x 32-bit + 64-bit operation to be executed in one clock cycle.
When not using MAC
When using MAC