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2.5” Solid State Disk
Transcend Information Inc.
V2.2
Description:
1. Host/device are powered and operating normally with some form of active communication.
2. Some condition in the host causes the host to issue COMRESET
3. Host releases COMRESET. Once the condition causing the COMRESET is released, the host releases the COMRESET
signal and puts the bus in a quiescent condition.
4. Device issues COMINIT – When the device detects the release of COMRESET, it responds with a COMINIT. This is also
the entry point if the device is late starting. The device may initiate communications at any time by issuing a COMINIT.
5. Host calibrates and issues a COMWAKE.
6. Device responds – The device detects the COMWAKE sequence on its RX pair and calibrates its transmitter (optional).
Following calibration the device sends a six burst COMWAKE sequence and then sends a continuous stream of the ALIGN
sequence starting at the device's highest supported speed. After ALIGNP Dwords have been sent
for 54.6us (2048 nominal Gen1 Dword times) without a response from the host as determined by detection of ALIGNP
primitives received from the host, the device assumes that the host cannot communicate at that speed. If additional speeds
are available the device tries the next lower supported speed by sending ALIGNP Dwords at that rate for
54.6 us (2048 nominal Gen1 Dword times.) This step is repeated for as many slower speeds as are supported. Once the
lowest speed has been reached without response from the host, the device enters an error state.
7. Host locks – after detecting the COMWAKE, the host starts transmitting D10.2 characters at its lowest supported rate.
Meanwhile, the host receiver locks to the ALIGN sequence and, when ready, returns the ALIGN sequence to the device at
the same speed as received. A host shall be designed such that it acquires lock in 54.6us (2048
nominal Gen1 Dword times) at any given speed. The host should allow for at least 873.8 us (32768 nominal Gen1 Dword
times) after detecting the release of COMWAKE to receive the first ALIGNP. This ensures interoperability with
multi-generational and synchronous designs. If no ALIGNP is received within 873.8 us (32768 nominal Gen1 Dword times)
the host restarts the power-on sequence – repeating indefinitely until told to stop by the Application layer.
8. Device locks – the device locks to the ALIGN sequence and, when ready, sends SYNCP indicating it is ready to start
normal operation.
9. Upon receipt of three back-to-back non-ALIGNP primitives, the communication link is established and normal operation
may begin.