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CHAPTER 10 8-BIT TIMER/EVENT COUNTERS 5 AND 6
Figure 10-17. PWM Output Operation Timings (CRn0 = FFH, Active High Setting)
Remark n = 5, 6
Figure 10-18. PWM Output Operation Timings (CRn0 Changing, Active High Setting)
Remark n = 5, 6
Caution If CRn0 is changed during TMn operation, the value changed is not reflected until TMn
overflows.
Count Clock
TMn Count Value
CRn0
TCEn
INTTMn
TOn
01
02 FF 00 01 02 FF 00 01
02
00
OVFn
FF FF FF
00
Inactive Level Inactive LevelActive Level
Inactive Level
Active Level
Count
Clock
TMn
Count
Value
CRn0
TCEn
INTTMn
TOn
OVFn
Active Level Inactive Level
00FFN + 2N + 1N020100FF 01 02 M + 2
M + 1
M
M + 3
00
Active Level Inactive Level
CRn0 Changing
N N MM
(N M)