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69 Chapter 2
Power Saver
The Power Saver screen displays all power saving options and settings.
Parameter Description Option
LDT Tristate Enables, disables the transition to tristate during an
LDT stop.
Enabled or Disabled
LDTCLK Clamp Enables, disables the digital clock clamp function.
Enabled or Disabled
LPLL CML Clamp Enables, disables the CML clock clamp function.
Disabled or Enabled
LPLL Active Activates, deactivates, ldtpll CML output.
Always Active or Deactivate
LPFPCI Clock Ratio Sets the LPFPCI clock ratio.
Enter numeric value (Default: 16)
USB CLK Slow Down Enables, disables the switch to 32KHz when no
devices are connected.
Disabled or Enabled
USB Clock Ratio Sets the USB clock ratio.
Enter numeric value (Default:
16)
USB2 Clock Ratio Sets the USB2 clock ratio.
Enter numeric value (Default: 16)
Aggressive L1 PD Enables, disables clocck clamp function in L1.
Disabled or Enabled
SPI Output PD Enables, disables SPI data and clock pads when not
in use.
Enabled or Disabled
IDE Clock Ratio Sets the IDE clock ratio.
Enter numeric value (Default:
16)
SATA Clock Select Sets the SATA clock speed.
133Mhz or 200Mhz
SATA Clock Ratio Sets the SATA clock ratio.
Enter numeric value (Default: 16)
TV Xtal Enables, disables the TV XTAL function.
Enabled or Disabled
DBG CG Enables, disables DBG CG.
Enabled or Disabled
DBG Low Power Enables, disables the DBG low power function for
energy saving.
Enabled or Disabled
AZA Clock Ratio Sets the AZA clock ratio.
Enter numeric value (Default:
16)
XTAL Enables, disables the powering down of the XTAL
pad during S3.
Enabled or Disabled
SM Clock slowdown Enables, disables the slowing down of the SM clock.
Disabled or Enabled