Asus CUC2000 Computer Hardware User Manual


 
ASUS CUC2000 Users Manual 63
4. BIOS SETUP
4. BIOS SETUP
SDRAM MA Wait State [Normal]
This controls the leadoff clocks for CPU read cycles. Leave on default setting. Con-
figuration options: [Fast] [Normal]
Graphics Window Size [64MB]
This feature allows you to select the size of mapped memory for AGP graphic data.
Configuration options: [4MB] [8MB] [16MB] [32MB] [64MB] [128MB] [256MB]
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache technology for
the video memory of the processor. It can greatly improve the display speed by
caching the display data. You must set this to UC (uncacheable) if your display card
cannot support this feature; otherwise your system may not boot. Configuration
options: [UC] [USWC]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA expansion cards that re-
quire it. Setting the address space to a particular setting will make that memory
space unavailable to the system. Expansion cards can only access memory up to
16MB. Configuration options: [Disabled] [Enabled]
PCI 2.1 Support [Enabled]
This function allows you to enable or disable PCI 2.1 features including passive
release and delayed transaction. Configuration options: [Disabled] [Enabled]
High Priority PCI Mode [Enabled]
This field allows you to give PCI slot 1 a higher priority. You may want to leave on
the default setting if you are using an IEEE-1394 PCI card. Configuration options:
[Disabled] [Enabled]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, secondary IDE channel, both, or
disable both channels. Configuration options: [Both] [Primary] [Secondary] [Dis-
abled]
Onboard ISA Bridge [Enabled]
If you are not using any ISA cards, you may disable this field. When this field is
disabled, the 8-bit and 16-bit I/O Recovery Time configurations will not be avail-
able. Configuration options: [Disabled] [Enabled]
8-bit, 16-bit I/O Recovery Time [3.5 BUSCLK]
Leave on default setting.
Chip Configuration