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CY7C1353G
Document #: 38-05515 Rev. *E Page 11 of 13
NOP, STALL and DESELECT Cycles
[19, 20, 22]
ZZ Mode Timing
[23,24]
Notes:
22.The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrates CEN
being used to create a pause. A write is not performed during this cycle.
23.Device must be deselected when entering ZZ mode. See truth table for all possible signal conditions to deselect the device.
24.DQs are in high-Z when exiting ZZ sleep mode
Switching Waveforms
READ
Q(A3)
45678910
A3 A4
A5
D(A4)
123
CLK
CE
WE
CEN
BW
[A:B]
ADV/LD
ADDRESS
DQ
C
OMMAND
WRITE
D(A4)
STALLWRITE
D(A1)
READ
Q(A2)
STALL NOP READ
Q(A5)
DESELECT CONTINUE
DESELECT
DON’T CARE UNDEFINED
t
CHZ
A1 A2
Q(A2)D(A1) Q(A3)
t
DOH
Q(A5)
t
ZZ
I
SUPPLY
CLK
ZZ
t
ZZREC
A
LL INPUTS
(except ZZ)
DON’T CARE
I
DDZZ
t
ZZI
t
RZZI
Outputs (Q)
High-Z
DESELECT or READ Only
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