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CY8C24123A
CY8C24223A, CY8C24423A
Document Number: 38-12028 Rev. *I Page 12 of 56
56-Pin Part Pinout
The 56-pin SSOP part is for the CY8C24000A On-Chip Debug (OCD) PSoC device.
Note This part is only used for in-circuit debugging. It is NOT available for production.
Table 7. Pin Definitions - 56-Pin SSOP
Pin
No.
Type
Pin
Name
Description
Digital Analog
1 NC No Connection Figure 10. CY8C24000A 56-Pin PSoC Device
2 IO I P0[7] Analog Column Mux Input
3 IO I P0[5] Analog Column Mux Input and
Column Output
4 IO I P0[3] Analog Column Mux Input and
Column Output
5 IO I P0[1] Analog Column Mux Input
6 IO P2[7]
7 IO P2[5]
8 IO I P2[3] Direct Switched Capacitor Block
Input
9 IO I P2[1] Direct sWitched Capacitor Block
Input
10 IO P4[7]
11 IO P4[5]
12 IO I P4[3]
13 IO I P4[1]
14 OCD OCD
E
OCD Even Data IO.
15 OCD OCD
O
OCD Odd Data Output
16 Power SMP Switch Mode Pump (SMP)
Connection to required External
Components
17 IO P3[7]
18 IO P3[5]
19 IO P3[3]
20 IO P3[1]
21 IO P5[3]
22 IO P5[1]
23 IO P1[7] I2C Serial Clock (SCL)
24 IO P1[5] I2C Serial Data (SDA)
25 NC No Connection
26 IO P1[3]
27 IO P1[1] Crystal Input (XTALin), I2C Serial
Clock (SCL), ISSP-SCLK*
28 Power Vdd Supply Voltage
29 NC No Connection
30 NC No Connection
31 IO P1[0] Crystal Output (XTALout), I2C
Serial Data (SDA), ISSP-SDATA*
32 IO P1[2]
33 IO P1[4] Optional External Clock Input
(EXTCLK)
SSOP
1
56
255
354
453
5
52
6
51
750
849
948
10
47
11 46
12 45
13
44
14 43
15
42
16
41
17
40
18 39
19 38
20
37
21 36
22
35
23 34
24 33
25 32
26 31
27
30
28
29
Vdd
P0[6], AI
P0[4], AIO
P0[2], AIO
P0[0], AI
P2[6], External VRef
P2[4], External AGND
P2[2], AI
P2[0], AI
P4[6]
P4[4]
P4[2]
P4[0]
CCLK
HCLK
XRES
P3[6]
P3[4]
P3[2]
P3[0]
P5[2]
P5[0]
P1[6]
P1[4], EXTCLK
P1[2]
P1[0], XTALOut, I2C SDA, SDATA
NC
NC
AI, P0[7]
AIO, P0[5]
AIO, P0[3]
AI, P0[1]
P2[7]
P2[5]
AI, P2[3]
AI, P2[1]
P4[7]
P4[5]
P4[3]
P4[1]
OCDE
OCDO
SMP
P3[7]
P3[5]
P3[3]
P3[1]
P5[3]
P5[1]
I2C SCL, P1[7]
I2C SDA, P1[5]
NC
P1[3]
SCLK, I2C SCL, XTALIn, P1[1]
Vss
NC
Not for Production
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