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PowerEdge R510 Technical Guide
How is this memory write
protected?
How is the memory cleared?
iDRAC6 SDRAM
n/a
AC cycle for BMC OS and reset/power off server for VGA frame
buffer
iDRAC6 FRU
writes controlled by iDRAC
embedded OS
EPPID is not clearable
iDRAC6 Boot Block
Flash
iDRAC embedded OS
control of the write
protection.
Not possible with any utilities or applications and iDRAC does not
function as expected if corrupted/removed. Lifecycle log is
clearable only in a factory environment.
SEL is user-clearable
Trusted Platform
Module
SW write protected
F2 Setup option
Chipset
CMOS
N/A - BIOS only control
Planar NVRAM_CLR jumper or Remove AC cord, remove cover,
remove coin cell battery. Wait for 30 seconds, replace battery,
cover and then AC cord.
F2 system setup option to restore defaults
Backplane (X8)
Storage Controller
Processor
Embedded firmware only
writeable through
controlled iDRAC methods
Not possible with any utilities or applications and backplane does
not function as expected if corrupted/removed.
Control Panel
Internal USB
OS control
OS control format
Power Supply
PSU Microcontroller
Protected by the
embedded
microcontroller. Special
keys are used by special
vendor-provided utilities
to unlock the ROM with
various CRC checks during
load.
N/A - not in system clearable
PDB Microcontroller
Unprotected
N/A - not in system clearable
PERC 6/i Adapter
PERC NVSRAM Config
Data
Storage controller
firmware accessed only
N/A - not in system clearable
PERC firmware
Write control access by
Storage Controller
firmware
N/A - not in system clearable
PERC Cache RAM
Storage controller
firmware accessed only
Storage controller firmware clearable only. Remove AC AND
deplete or remove backup battery.