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6.3 Systemboard
Processor Configuration
Up to 8 CPU configuration is supported as described in Table 6.3 .
Table 6.3 CPU Module Configurations
CPU Slot # Additional Power
Supply units
0 1 2 3 4 5 6 7
2CPU Yes - - - Yes - - - -
3CPU Yes - Yes - Yes - - - 1DDC,1FEP
4CPU Yes - Yes - Yes - Yes - 1DDC
5CPU Yes Yes Yes - Yes - Yes - 1DDC,1PPU
6CPU Yes Yes Yes - Yes Yes Yes - 1DDC
7CPU Yes Yes Yes Yes Yes Yes Yes - 1DDC
8CPU Yes Yes Yes Yes Yes Yes Yes Yes 1DDC
IMPORTANT
If any of the above conditions is not satisfied, the operation is not guaranteed.
Memory configuration
The M600 has 32 memory slots, allowing for as much as 8 gigabytes of main memory. When
intsalling the memory modules, the following conditions must be satisfied:
When installing the first set of DIMM, install a set of 4 modules of same size in slots 0 and 1 of
both groups A and B.
At subsequent memory expansions, install a set of 4 modules in slots 2 and 3 of both groups A
and B. Then, install a set of 8 modules in slots 4 to 7 of both groups A and B. Finally, install a
set of 16 modules in slots 8 to 15 of both groups A and B. The modules installed in the slots of a
group must have the same size.
Alternatively, install the set of 4 or 8 or 16 modules of same size in just group A. The set of
modules must be installed in the lowest available slots. However, ASR (Automatic System
Reconfiguration) from memory failure may not work, in this memory configuration.
IMPORTANT
If any of the above conditions is not satisfied when installing the DIMMs, some DIMMs are
degraded in the power-on diagnostics. When expanding the memory modules, check that
the DIMMs are installed correctly.
Memory ECC feature
The EDO DRAM is used as the memory chip. The single-bit error correction and multiple-bit error
detection features are available for a large capacity memory by using the Error Check Code (ECC)
system. A single-bit error can be isolated down to the memory slot on which it occurred. A
multiple-bit error can be isolated down to the pair of slots on which it occurred.
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