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P3 Series User's Manual
9 Early Cache Initialization Cyrix CPU initialization. Cache initialization.
A Setup Interrupt Vector Initialize rst 120 interrup tvectors with SPURIOUS_INT_HDLR
Table and initialize INT 00h-1Fh according to INT_TBL.
B Test CMOS RAM Test CMOS RAM Checksum, if bad, or insert key pressed,
Checksum load defaults.
C Initialize keyboard Detect type of keyboard controller.
(optional) Set NUM_LOCK status.
D Initialize Video Detect CPU clock. Read CMOS location 14h to nd out type
Interface of video in use. Detect and Initialize Video Adapter.
E Test Video Memory Test video memory, write sign-on message to screen.
Setup shadow RAM - Enable shadow according to Setup.
F Test DMA Controller 0 BIOS checksum test. Keyboard detect and initialization.
10 Test DMA Controller 1
11 Test DMA Page Registers Test DMA Page Registers.
12-13 Reserved
14 Test Timer Counter 2 Test 8254 Timer 0 Counter 2.
15 Test 8259-1 Mask Bits Verify 8259 Channel 1 masked interrupts by alternately
turning off and on the interrupt lines.
16 Test 8259-2 Mask Bits Verify 8259 Channel 2 masked interrupts by alternately turning
off and on the interrupt lines.
17 Test Stuck 8259's Turn off interrupts then verify no interrupt mask register is on.
Interrupt Bits
18 Test 8259 Interrupt Force an interrupt and verify the interrupt occurred.
Functionality
19 Test Stuck NMI Bits Verify NMI can be cleared.
(Parity/IO Check)
1A Display CPU clock
1B-1E Reserved
1F Set EISA Mode If EISA non-volatile memory checksum is good, execute EISA
initialization. If not, execute ISA tests an clear EISA mode ag.
Test EISA Conguration Memory Integrity (checksum &
communication interface).
20 Enable Slot 0 Initialize slot 0 (System Board).