Intel IP-4MTS6B Computer Hardware User Manual


 
Award BIOS Setup
47
Active To Precharge Delay:
Select the operating system that is active to precharge delay.
The choice: 5, 6, 7.
DRAM RAS# To CAS# Delay:
This field let’s you insert a timing delay between the CAS and RAS strobe
signals, used when DRAM is written to, read from, or refreshed. Fast gives
faster performance; and Slow gives more stable performance. This field
applies only when synchronous DRAM is installed in the system.
The choice: 2, 3.
DRAM RAS# Precharge:
If an insufficient number of cycles are allowed for the RAS to accumulate its
charge before DRAM refresh, the refresh may be incomplete and the DRAM
may fail to retain data. Fast gives faster performance; and Slow gives more
stable performance. This field applies only when synchronous DRAM is
installed in the system.
The choice: 2, 3.
DRAM Data Integrity Mode:
This item shows you the Dram have ECC function or not.
The choice: Non-ECC, ECC.
MGM Core Frequency:
This item allows you to determine the MGM core frequency.
The choice: Auto Max 266MHz, 400/266/133/200MHz,
400/200/100/200MHz, 400/200/100/133MHz,
400/266/133/267MHz, 400/333/166/250MHz,
Auto Max 400/333.
System BIOS Cacheable:
Selecting “Enabled” allows caching of the system BIOS ROM at
F0000h-FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result.
The choice: Enabled, Disabled.
Video BIOS Cacheable:
Select “Enabled” allows caching of the video BIOS, resulting in better
system performance. However, if any program writes to this memory area, a
system error may result.
The choice: Enabled, Disabled.