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Customer Reference Board Manual 45
Intel® IQ80333 I/O Processor
Software Reference
Software Reference 4
4.1 DRAM
For DDR SDRAM Sizes and Configurations, see theIntel
®
80333 I/O Processor Developer’s
Manual. This section also contains multiple examples of Address Register Programming.
See the Intel
®
80333 I/O Processor Design Guide, section 8, table 34 for supported DDR333 and
DDR-II configurations.
For all registers relating to DRAM and other MCU related registers, see the Intel
®
80333 I/O
Processor Developer’s Manual.
4.2 Components on the Peripheral Bus
The 80333 has a peripheral bus which contains the following peripheral devices:
• Flash ROM
• CPLD
• Audio Buzzer
• Rotary Switch
• Hex Display
Peripheral memory-Mapped Register Locations and all registers associated with PBI or the Peripheral
Bus Interface Unit can be found in the Intel
®
80333 I/O Processor Developer’s Manual.