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6 February, 2005 Customer Reference Board Manual
Intel® IQ80333 I/O Processor
Contents
Figures
1Intel
®
80333 I/O Processor Block Diagram ................................................................................13
2 Serial-UART Communication .....................................................................................................19
3 JTAG Debug Communication.....................................................................................................19
4 Network Communication Example .............................................................................................20
5Intel
®
80333 I/O Processor Functional Block Diagram...............................................................25
6 Board Form Factor .....................................................................................................................26
7Intel
®
IQ80333 I/O Processor Evaluation Platform Board Peripheral Bus Topology..................31
8 Flash Connection on Peripheral Bus..........................................................................................32
9 JTAG Port Pin-out ......................................................................................................................36
10 RESET Sources .........................................................................................................................37
11 Default Switch Setting Switch S7A1...........................................................................................38
12 Flash Connection to Peripheral Bus ...........................................................................................46
13 Intel
®
80333 I/O Processor Memory Map...................................................................................48
14 Intel
®
80333 I/O Processor Hardware Setup Flow Chart ...........................................................55
15 Software Flow Diagram ..............................................................................................................56