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Quick Start Guide—Intel
®
IXDP465 Development Platform
AN Intel
®
IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 13
MII/SMII/UTOPIA:
ETH B
JP4
Connects ETH B-specific shared NPE
signals to the NPE B mezzanine card
Installed. F
MII/SMII/UTOPIA:
ETH C
JP65
JP95
Connects ETH C-specific shared NPE
signals to the NPE C mezzanine card
Installed.
Installed.
F
MII/SMII/UTOPIA
JP9
JP11
Connects a 33 MHz signal on both
UTP_OP_CLK and UTP_IP_CLK
Not installed.
Not installed.
F
Table 4. Intel
®
IXDP465 Baseboard Jumper Descriptions and Default Settings (Sheet 2 of 2)
Board Location
(See Figure 3)
Ref ID
Jumper Description
for Installed State
Default
Settings
Quick Start
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