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Operation Theory
3.
I_REQ & I_ACK Handshaking
valid data
D10~DI31
valid data
t1
t2
t5
t4t3
IN I_REQ
IN I_ACK
t
1
≥
0ns t
5
≥
60ns t
3
≥
2 PCI CLK Cycle
t
2
≥
0ns t
4
≥
1 PCI CLK Cycle
Note:
I_REQ must be asserted until I_ACK asserts, I_ACK will be asserted
until I_REQ de-asserts.
4.
O_REQ as output data strobe
Out O_REQ
t
cyc
t
h
t
s
D00~D031
valid data
valid data
t
s
≥
19ns t
h
≥
2 PCI CLK Cycles T
cyc
≥
500ns