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Chapter 4 Award BIOS Setup
Page: 4-12
PMB-531LF USER
′
S MANUAL
This parameter allows you to configure the system based on the specific
features of the installed chipset. The chipset manages bus speed and
access to system memory resources, such as DRAM and the external cache.
It also coordinates communications between conventional ISA bus and the
PCI bus. It must be stated that these items should never need to be altered.
The default settings have been chosen because they provide the best opera-
ting conditions for the system. The only time you might consider making
any changes would be if you discovered that data was being lost while
using your system.
DRAM TIMEING SELECTABLE:
The value in this field depends on performance parameters of the installed
memory chips (DRAM). Do not change the value from the factory setting
unless you install new memory that has a different performance rating than
the original DRAMs.
CAS LATENCY TIME:
When synchronous DRAM is installed, the number of clock cycles of CAS
latency depends on the DRAM timing.
DRAM RAS# TO CAS# DELAY:
This item let you insert a timing delay between the CAS and RAS strobe
signals, used when DRAM is written to, read from, or refreshed. Fast
gives faster performance; and Slow gives more stable performance. This
field applies only when synchronous DRAM is installed in the system.
The choices are 2 and 3.
DRAM RAS# PRECHARGE TIME:
If an insufficient number of cycles is allowed for the RAS to accumulate its
charge before DRAM refresh, the refresh may be incomplete and the DRAM
may fail to retain data. Fast gives faster performance; and Slow gives more
stable performance. This field applies only when synchronous DRAM is
installed in the system. The choices are 2 & 3.
PRECHARGE DEALY (tRAS):
Precharge Delay This setting controls the precharge delay, which
determines the timing delay for DRAM precharge
System Memory Frequency:
Allow to choose different frequency of memory module.