Intel PMB-601LF Computer Hardware User Manual


 
Chapter 4 Award BIOS Setup
Page: 4-12
PMB-601LF USER
S MANUAL
4-5. ADVANCED CHIPSET FEATURES
Choose theADVANCED CHIPSET FEATURESfrom the main menu,
the screen shown as below.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
DRAM Timing Selectable
X CAS Latency Time
X DRAM RAS# to CAS# Delay
X DRAM RAS# Precharge
X Precharge dealy (tRAS)
X System Memory Frequency
Memory Hole At 15M-16M
** VGA Setting **
PEG/Onchip VGA Control
On-Chip Frame Buffer Size
DVMT Mode
DVMT/ FIXED Memory Size
[By SPD]
Auto
Auto
Auto
Auto
By SPD
[Disabled]
[Auto]
[8MB]
[DVMT]
[128 MB]
Menu Level
↑↓→←: Move Enter: Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values F6: Fail-Safe Defaults F7:Optimized Defaults
Chipset Features Setup Screen
This parameter allows you to configure the system based on the specific
features of the installed chipset. The chipset manages bus speed and
access to system memory resources, such as DRAM and the external cache.
It also coordinates communications between conventional ISA bus and the
PCI bus. It must be stated that these items should never need to be altered.
The default settings have been chosen because they provide the best opera-
ting conditions for the system. The only time you might consider making
any changes would be if you discovered that data was being lost while
using your system.
DRAM TIMEING SELECTABLE:
The value in this field depends on performance parameters of the installed
memory chips (DRAM). Do not change the value from the factory setting
unless you install new memory that has a different performance rating than
the original DRAMs.