Renesas SH7343 Network Card User Manual


 
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12. Memory Access during Break
In the enabled MMU, when a memory is accessed and a TLB error occurs during break, it can
be selected whether the TLB exception is controlled or the program jumps to the user
exception handler in [TLB Mode] in the [Configuration] dialog box. When [TLB miss
exception is enable] is selected, a “Communication Timeout error” will occur if the TLB
exception handler does not operate correctly. When [TLB miss exception is disable] is selected,
the program does not jump to the TLB exception handler even if a TLB exception occurs.
Therefore, if the TLB exception handler does not operate correctly, a “Communication
Timeout error” will not occur but the memory contents may not be correctly displayed.
13. Loading Sessions
Information in [JTAG clock] of the [Configuration] dialog box cannot be recovered by loading
sessions. Thus the TCK value will be 1.25 MHz.
14. [IO] window
Display and modification
Do not change values of the User Break Controller because it is used by the emulator.
For each RCLK watchdog timer register, there are two registers to be separately used for
write and read operations.
Table 2.3 RCLK Watchdog Timer Register
Register Name Usage Register
RWTCSR(W) Write RCLK watchdog timer control/status register
RWTCNT(W) Write RCLK watchdog timer counter
RWTCSR(R) Read RCLK watchdog timer control/status register
RWTCNT(R) Read RCLK watchdog timer counter
The RCLK watchdog timer operates only when the user program is executed. Do not
change the value of the frequency change register in the [IO] window or [Memory] window.
The internal I/O registers can be accessed from the [IO] window. However, note the
following when accessing the SDMR register of the bus-state controller. Before accessing
the SDMR register, specify addresses to be accessed in the I/O-register definition file
(SH7343.IO) and then activate the HEW. After the I/O-register definition file is created,
the MPU’s specifications may be changed. If each I/O register in the I/O-register
definition file differs from addresses described in the hardware manual, change the I/O-
register definition file according to the description in the hardware manual. The I/O-
register definition file can be customized depending on its format. Note that, however, the
E10A emulator does not support the bit-field function.