Filter
Top Products
AN.No.G1216B1N000-3D0E
- 8 -
2.2.1 Block Diagram (Segment Driver)
Input and Output Buffer
Instruction Register
X, Y-Address
Counter
Z-Address
Counter
Display Start Line
Register
Busy Flag
Display Data RAM
4096 bit
CS R/W D/I
DB
0
to DB
7
E
LC Driver
Display ON/OFF
M
FRM
CL1
RST
Input
Register
Output
Register
Display Data Latch
Segment Driver
V
DD
V
SS
V
LC
8
6
Interface Control
4
V
a
V
c
V
d
V
f
64
64
8
8
8
8
9
9
6
6
Y1 Y2
Y64
2
Fi
g
ure
3 Se
g
ment Driver