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ELECTRICAL SPECIFICATION SSD-HXXX(I)-3650 DATA SHEET
SILICONSYSTEMS PROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
DOCUMENT: 3650H-02DSR JUNE 17, 2008 PAGE 7
DMARQ 21 O DMA Request. This signal is used for DMA
transfers between the host and device.
DMARQ is asserted by the device when the
device is ready to transfer data to/from the
host. The direction of data transfer is
controller by -IORD and -IOWR. This signal
is used in a handshake manner with
-DMACK (i.e., the device waits until the
host asserts -DMACK before negating
DMARQ, and reasserts DMARQ if there is
more data to transfer). The DMARQ/
-DMACK handshake is used to provide flow
control during the transfer.
GND 2, 19, 22,
24, 26,
30, 40,
43
- Ground. The device ground signal.
INTRQ 31 O Interrupt Request. This signal is an active
high interrupt request to the host.
IORDY 27 I I/O Channel Ready. The signal is negated
to extend the host transfer cycle of any host
register access.
-IORD 25 I Device I/O Read. This is the read strobe
signal from the host. The falling edge of
IORD enables data from the device onto
the data bus. The rising edge of IORD
latches data at the host. The host does not
act on the data until it is latched.
-IOWR 23 I Device I/O Write. This is the write strobe
signal from the host. The rising edge of
IOWR# latches data from the data bit
signals. The device does not act on the
data until it is latched.
KEY 20 - Key. Reserved for the Connector Key.
-PDIAG 34 I/O Pass Diagnostic. This open drain signal is
asserted by the slave to indicate to the
master that it has passed its diagnostics.
Table 8: Signal Descriptions (Continued)
Signal Name Pin(s) Type Description