Silicon Laboratories SI5323 Clock User Manual


 
Si53xx-RM
Rev. 0.5 53
7LLHM
19.44 1 19.44 19.44 0.008
8LLHH
2 38.88 38.88 0.008
9LMLL
4 77.76 77.76 0.008
10 LMLM
8 155.52 155.52 0.008
11 LMLH 8 x (255/238) 166.63 166.63 NA
12 LMML 8 x (255/237) 167.33 167.33 NA
13 LMMM 8 x (255/236) 168.04 168.04 NA
14 LMMH
16 311.04 311.04 0.008
15 LMHL
32 622.08 622.08 0.008
16 LMHM 32 x (255/238) 666.51 666.51 NA
17 LMHH 32 x (255/237) 669.33 669.33 NA
18 LHLL 32 x (255/236) 672.16 672.16 NA
19 LHLM
48 933.12 933.12 0.008
20 LHLH
54 1049.76 1049.76 0.008
21 LHML
38.88 1 38.88 38.88 0.008
22 LHMM
2 77.76 77.76 0.008
23 LHMH
4 155.52 155.52 0.008
24 LHHL
16 622.08 622.08 0.008
25 LHHM 16 x (255/238) 666.51 666.51 NA
26 LHHH 16 x (255/237) 669.33 669.33 NA
27 MLLL 16 x (255/236) 672.16 672.16 NA
Table 16. SONET Clock Multiplication Settings (FRQTBL=L) (Continued)
No FRQSEL
[3:0]
WB
f
IN
MHz Mult Factor Nominal
f
OUT
MHz
All Devices Si5366 Only
f
CKOUT5
(MHz)
(CK_CONF = 0)
FS_OUT (MHz)
(CK_CONF = 1)