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Si53xx-RM
52 Rev. 0.5
6.1.2. Clock Multiplication (Si5322, Si5323, Si5365, Si5366)
These parts provide flexible frequency plans for SONET, DATACOM, and interworking between the two (Table 16,
Table 17, and Table 18 respectively). The CKINn inputs must be the same frequency as specified in the tables. The
outputs are the same frequency; however, in the Si5365 and Si5366, CKOUT3 and CKOUT4 can be further divided
down by using the DIV34 [1:0] pins.
The following notes apply to Tables 16, 17, and 18:
1. All entries are available for the Si5323 and Si5366. Only those marked entries under the WB column are
available for the Si5322 and Si5365.
2. The listed output frequencies appear on CKOUTn. For the Si5365 and Si5366, sub-multiples are available on
CKOUT3 and CKOUT4 using the DIV34[1:0] control pins.
3. All ratios are exact, but the frequency values are rounded.
4. For bandwidth settings, f3 values, and frequency operating ranges, consult DSPLLsim.
5. For the Si5366 with CK_CONF = 1, CKIN3 and CKIN4 are the same frequency as FS_OUT.
Table 16. SONET Clock Multiplication Settings (FRQTBL=L)
No FRQSEL
[3:0]
WB
f
IN
MHz Mult Factor Nominal
f
OUT
MHz
All Devices Si5366 Only
f
CKOUT5
(MHz)
(CK_CONF = 0)
FS_OUT (MHz)
(CK_CONF = 1)
0 LLLL 0.008 1 0.008 0.008 0.008
1 LLLM 2430 19.44 19.44 0.008
2 LLLH 4860 38.88 38.88 0.008
3 LLML 9720 77.76 77.76 0.008
4 LLMM 19440 155.52 155.52 0.008
5 LLMH 38880 311.04 311.04 0.008
6 LLHL 77760 622.08 622.08 0.008