Filter
Top Products
High Speed Inter-Chip USB 2.0 Hub and Flash Media Controller
Datasheet
SMSC USB4640/USB4640i 19 Revision 1.0 (06-01-09)
DATASHEET
xD_nWP 21 O8PD xD-Picture Card Write Protect
This pin is an active low write protect signal for the xD-Picture Card
device. This pin has a weak pull-down resistor that is permanently
enabled.
SPI INTERFACE
SPI_CE_n 8 O12 SPI Chip Enable
This is the active low chip enable output. If the SPI interface is
enabled, this pin must be driven high in power down states.
SPI_CLK /
GPIO4 /
SCL
9 I/O12 This is the SPI clock out to the serial ROM. See Section 6.4, "ROM
BOOT Sequence" for diagram and usage instructions. During reset,
drive this pin low.
I/O6 This pin may be used either as input, edge sensitive interrupt input,
or output. Custom firmware is required to activate this function.
When configured, this is the I
2
C EEPROM clock pin.
SPI_DO /
GPIO5 /
SDA /
SPI_SPD_SEL
10 I/O12 This is the data out for the SPI port. See Section 6.4, "ROM BOOT
Sequence" for diagram and usage instructions.
I/O6 This pin may be used either as input, edge sensitive interrupt input,
or output. Custom firmware is required to activate this function.
This pin is the data pin when the device is connected to the optional
I
2
C EEPROM.
I/O12 This pin is used to select the speed of the SPI interface. During
nRESET assertion, this pin will be tri-stated with the weak pull-down
resistor enabled. When nRESET is negated, the value on the pin will
be internally latched, and the pin will revert to SPI_DO functionality,
the internal pull-down will be disabled.
‘0’ = 30 MHz (No external resistor should be applied.)
‘1’ = 60 MHz (A 10 K external pull-up resistor must be applied.)
If the latched value is '1', then the pin is tri-stated when the chip is
in the suspend state.
If the latched value is '0', then the pin is driven low during a suspend
state.
SPI_DI 11 I/O12PD This is the SPI data in to the controller from the ROM. This pin has
a weak internal pull-down applied at all times to prevent floating.
MISC
GPIO1 /
LED /
TXD
37 I/O6 General Purpose I/O
This pin may be used either as input, edge sensitive interrupt input,
or output. Custom firmware is required to activate this function.
GPIO1 can be used as an LED output.
This signal can be configured as the TXD output of the internal
UART. Custom firmware is required to activate this function.
Table 6.1 USB4640/USB4640i Pin Descriptions (continued)
SYMBOL
48-PIN
QFN
BUFFER
TYPE
(Table 6.2)DESCRIPTION