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SUPERSERVER 6015TC-T/6015TC-10G User's Manual
Intel EIST Support (Available if supported by the CPU)
Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the
system to automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. The options are Enabled and
Disabled. Please refer to Intel’s web site for detailed information.
XCPU Cache Control
Adjacent Cache Line Prefetch (Available when supported by the CPU)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.
IP Prefetch (Available when supported by the CPU)
Select Enabled to use CPU Cache Line IP Prefetch. The options are Disabled and
Enabled.
Direct Cache Access (Available when supported by the CPU)
Set to Enable to route inbound network IO traffi c directly into processor caches
to reduce memory latency and improve network performance. The options are
Disabled and Enabled.
XI/O Device Confi guration
Access the submenu to make changes to the following settings.
Serial Port A
This setting allows you to assign control of serial port A. The options are Enabled
(user defi ned), Disabled and Auto (BIOS or OS controlled).
Base I/O Address
This setting allows you to select the base I/O address for serial port A. The op-
tions are 3F8, 2F8, 3E8 and 2E8.
Interrupt
This setting allows you to select the IRQ (interrupt request) for serial port A. The
options are IRQ3 and IRQ4.
Serial Port B
This setting allows you to assign control of serial port B. The options are Enabled
(user defi ned), Disabled, Auto (BIOS controlled) and OS Controlled.