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SUPER P4SCT/P4SCT+/P4SCT+II User's Manual
Pin
Number
1
2
Definition
Ground
Wake-up
Wake-On-Ring Pin
Definitions (WOR)
Keylock Enable/Disable
The Keylock header is located on
J36. Close Pin 1 and Pin 2 of J36
to enable the function of Keylock.
The default setting is "Open". See
the table on the right for pin defini-
tions.
Pin
Definitions
1 & 2 (closed)
1 & 2 (Open)
Function
Enabled
Disabled
Keylock Enabled/Disabled
(J36) Pin Definitions
Wake-On-Ring
The Wake-On-Ring header is designated
WOR. This function allows your com-
puter to receive and be "awakened" by
an incoming call when in the suspend
state. See the table on the right for pin
definitions. You must also have a WOR
card and cable to use WOR.
CPU
478 PGA
MCH
PWR LED
COM2
USB 1/2
P
a
ra
lle
l P
o
r
t
JPWAKE
WOR
O
H
F
A
N
/
C
H
F
a
n
5
COM 1
VGA
GLAN 1
PCI 1-X
PCI-X 2
PCI -X 3
PCI 2
F
L
O
P
P
Y
BATTERY
BIOS
DIMM 0A (Blue)
Watch Dog
FRONT PANEL CTR
BANK0
BANK1
®
JF1
WOL
IR
S
u
p
e
r I/O
Speaker
I-SATA LED
Keylock
USB 3/4
24-pin ATX PWR Conn
S
UPER P4SCT/P4SCT+/P4SCT+II
GLAN 2
PCI 1
CHS FAN3
Intel's SATA2
K
B
/M
o
u
s
e
JPUSB
LAN2 Enable
RAGE-XL
+12V 4-pin PWR Conn.
PWR Froce On
(North Bridge)
CHS FAN4
C
P
U
S
p
e
e
d
C
P
U
/
C
H
F
a
n
1
Intel's SATA1
SATA1/5
SATA3/7SATA4/8
VGA Enable
AGP Pro
SMBus
SATA CTLR
GLAN CTLR
82541
CLR CMOS
Hance
Rapids
M-SATA1-2 Enable
Marvell
SATA2/6
ID
E
1
ID
E
2
Ch. Intru.
CHS FAN2
(Marvall's SATA)
Standby LED
LAN CTLR
82547
DIMM 1A (Blue)
DIMM 0B (Black)
DIMM 1B (Black)
Speaker
M- SATA LED
PWR Force On
A. Wake-On Ring
B. Keylock Enable
A
B