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BIOS SPECIFICATION
6-20
6.2.3 IDE Controller
6.2.3.1 Function and Feature
The ICH7-M IDE controller features two sets of interface signals(Primary and Secondary) that
can be independently enabled, tri-stated or driven low.
The ICH7-M IDE controller supports both legacy mode and native mode IDE interface. In
native mode, the IDE controller is a fully PCI compliant software interface and does not use
any legacy I/O or interrupt resources.
The IDE interface of the ICH7-M can support several types of data transfers:
PIO(Programmed I/O) : CPU is in control of the data transfer.
DMA : DMA protocol that resembles the DMA on the ISA bus, although it does not use the
8237 in the ICH7-M. This protocol offloads the CPU from moving data. This allows higher
transfer rate of up to 16MB/s.
Ultra DMA/33 : DMA protocol that redefines signals on the IDE cable to allow both host and
target throttling of data and transfer rates of up to 33MB/s.
Ultra DMA/66 : DMA protocol that redefines signals on the IDE cable to allow both host and
target throttling of data and transfer rates of up to 66 MB/s.
Ultra DMA/100 : DMA protocol that redefines signals on the IDE cable to allow both host and
target throttling of data and transfer rates of up to 100 MB/s.
6.2.4 Audio
S62F uses the internal High Definition Audio Host Controller of ICH7-M.
6.2.5 USB 2.0 (EHCI)
6.2.5.1 Overview
The ICH7-M contains an Enhanced Host Controller Interface(EHCI) compliant host controller
which supports up to 8 USB 2.0 specification compliant root ports. USB 2.0 allows data
transfer rate up to 480Mbps using the same pins as the 8 USB 1.1 ports. The ICH7-M
contains port-routing logic that determines whether a USB port is controlled by one of the
UHCI controllers or by the EHCI controller. USB2.0 based Debug Port is also implemented in
the ICH7-M.
6.2.5.2 – Device Connects operation mode
1. Configure Flag = 0 and an USB 1.1-Only Device is connected.
- In this case, the USB 1.1 Controller is the owner of the port both before and after the
connection occurred. The EHC never sees the connection occurred. The UHCI driver
handles the connection and initialization process.
2. Configure Flag = 0 and an USB 2.0-Capable Device is connected.
- In this case, the USB 1.1 Controller is the owner of the port both before and after the
connection occurred. The EHC never sees the connection occurred. The UHCI driver
handles the connection and initialization process. Since the USB 1.1 Controller does not
perform the high-speed chirp handshake, the device operates in compatible.
3. Configure Flag = 1 and an USB 1.1-only Device is connected.
- In this case, the USB 2.0 controller is the owner of the port before the connection
occurred. The EHCI driver handles the connection and performs the port reset. After the
reset process completes, the EHC hardware has cleared(not set) the Port Enable bit in
the EHC’s PORTSC register. The EHCI driver then writes a 1 to the Port Owner bit in the