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4–10 Functional Description
Interrupts
register. Interrupts latched in the interrupt request register can be reset individually
by writing a 1 to the bit to be cleared. This immediately clears the bit to avoid taking
a second interrupt. Figure 4–5 shows the interrupt request register.
Figure 4–5 Interrupt Request Register
The interrupt mask register provides individual mask bits for each interrupt.
Table 4–2 lists the AlphaPC 164SX system interrupts, and Table 4–3 lists the ISA
interrupts.
1
IPL = interrupt priority level (fixed)
Table 4–2 AlphaPC 164SX System Interrupts
21164PC Interrupt IPL
1
Suggested Usage AlphaPC 164SX Usage
cpu_irq[0] 20 Corrected system error Reserved
cpu_irq[1] 21 — PCI and ISA interrupts
cpu_irq[2] 22 Interprocessor and
timer interrupts
TOY clock interrupt
cpu_irq[3] 23 — Reserved
pwr_fail_irq 30 Powerfail interrupt Reserved
sys_mch_chk_irq 31 System machine check
interrupt
NMI and 21174 errors
mch_hlt_irq — Halt Reserved
31 24 23 20 19 16 15 12 11 08 07 06 05 03 02 01 00
63 62
A2 A3A1A0B2 B3B1B0
C2 C3C1C0D2 D3D1D0
06 07050402 030100
Reserved
NMI INT
Halt INT
Reserved
Real-time CLK_INT
ISA_INT
PCI_INT A
n
PCI_INT B
n
PCI_INT C
n
PCI_INT D
n
CONFIG[7:0]
Reserved
21174 CLK_INT
ERROR INT
61 32