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32 ©Copyright 2005 CyberResearch, Inc
4.6 Advanced Chipset Features
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing Selectable By SPD Item Help
CAS Latency Time 2 Menu Level X
Active to Precharge Delay 8
DRAM RAS# to CAS# Delay 4
DRAM RAS# Precharge 4 Change the day, month,
Memory Frequency For Auto year and century
System BIOS Cacheable Enabled
Video BIOS Cacheable Enabled
Memory Hole At 15M-16M Disabled
Delay Prior to Thermal 16 Min
AGP Aperture Size (MB) 128
Init Display First PCI Slot
** ON-chip VGA Setting **
On-chip VGA Enabled
On-chip Frame Buffer size 16MB
Boot Display Auto
Panel Scaling Auto
Panel Number 1
TV Standard Off
Video Connector Automatic
TV Format Auto
ÇÈÆÅ: Select Item + / - /PU/PD: Value F10: Save ESC: Quit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults