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CY14B101P
Document #: 001-44109 Rev. *B Page 31 of 32
Document History Page
Document Title: CY14B101P 1 Mbit (128K x 8) Serial SPI nvSRAM with Real Time Clock
Document Number: 001-44109
REV. ECN NO.
Submission
Date
Orig. of
Change
Description of Change
** 1939467 See ECN UNC/AESA New Data Sheet
*A 2607447 11/21/2008 GSIN/
GVCH/AESA
Updated the “Feature” section, Clock rate changed from 40 MHz to 25 MHz
Updated nvSRAM STORE, RECALL, AutoStore Enable/Disable sections
-- Removed Soft Sequence, added SPI instructions for STORE, RECALL,
AutoStore Enable and Disable, Updated SPI with following changes:
-- Added more information for protocol
-- Added four new SPI instruction
-- WEN bit cleared on CS going HIGH edge after Write instructions and four
nvSRAM special instructions
-- Added RDY
bit to Status Register for indicating Store/Recall in progress
Added READ RTC and WRITE RTC instructions.
Changed RTC recommended configuration values.
Updated tOCS values for normal and room temperature
Other changes as per new EROS
-- Removed 8 SOIC package
-- Added two new 8DFN packages
-- Changed tCO parameter to 9 ns
-- Updated data sheet template
--Replaced CY14B101P with CY14B101PA.
Changed title to “CY14B101PA 1Mbit (128K x 8) Serial SPI nvSRAM with
Real-Time-Clock”
*B 2654487 02/04/2009 GVCH/GSIN/
PYRS
Moved from Advance information to Preliminary
Changed part number from CY14B101PA to CY14B101P
Changed X
1
, X
2
pin names to X
out
, X
in
respectively
Updated pin description of V
CAP
pin
Updated Device operation and SPI peripheral interface description
Added Factory setting values for BP1, BP2 and WPEN bits
Updated Real Time Clock operation description
Added footnote 2
Added default values to RTC Register Map” table 8
Added footnote 3
Updated flag register description in Register Map Detail” table 9
Changed C1, C2 values to 21pF, 21pF respectively
Changed I
CC2
from 5 mA to 10 mA
Changed I
BAK
value from 350 nA to 450 nA at hot temperature
Changed V
RTCcap
typical
value from 2.4V to 3.0V
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