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NV3128 RS-422A Machine-Control Data Routing Switch 4-8
4.2.5 UNIVERSAL CONTROL/COMMAND INTERPRETER MODULE ASSY:
EM0127-XX, EM0134-XX, EM0035-XX
The following discussion refers to both the Universal Control and
Command Interpreter modules. Although these modules use different
designs, they are functionally very similar.
The Universal Control/Command Interpreter Module receives take
commands from an external controller and reformats them for use by
the Crosspoint Module. Additionally, the module parses the incoming
commands to determine which port of a connection is controlled, and
which is controlling. It subsequently sends control data to the I/O
boards to select the state of the ports accordingly.
Further, the assembly contains all circuitry required to configure the
NV3128, and produces master timing signals for the system.
MAPPING
At the heart of the module are the microprocessors that govern circuit
operation. The firmware configuring these devices , stored in EPROMs,
is especially tailored to the controller protocol the module is to
interpret. This approach lends itself to custom control interfaces and
simplifies the development of new ones.
The microprocessors process matrix data stored in SRAM into
address and control data for use by the crosspoint and I/O modules.
The SRAM IC is divided into two memory banks, A and B. Only one
of these banks is active at any time.
Line driver/receivers link a UART with the external controller . A
microprocessor writes the UART data into the inactive RAM bank.
Once the data is read, the banks reverse roles: the newly written RAM
defines the matrix, while the other becomes inactive, and thus, writeable.
The use of dual memories allows data to be entered at any time without
disturbing the gate arrays bitstream generation. Line drivers drive
output address and control data over the signal backplane to the
crosspoint and I/O modules.
Matrix information is also stored in a third memory. If system power
is lost, the charge on a one-farad capacitor will maintain the backup
RAM for up to 20 minutes. Upon restoration of power, the system will
read the matrix data and return to the matrix state that existed before
shutdown.